Simulate Translate Test


Source III is a software development company focused on providing EDA tools for dealing with the tasks of accessing, translating and managing vector data for both logic simulation and device testing. Service has always been, and will continue to be, our major emphasis. Our philosophy is that, in order for our products to be successful our customers must be successful with them in a timely and cost-effective manner. We provide a personal level of service to get customers up and productive with our tools - often adding custom enahncements to deal with new requirements. In fact, all of our development work is customer-driven. All products include 12 months of support and maintenance so that we can assure your success.

For our OEM customers, we strive to provide timely, flexible service with customized products which meet your specific needs. Our turn-around times for delivering customized Reader and Writer IP modules is often weeks rather than months.

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Request Evaluation Key

Register for an Evaluation License Key: VTRAN®, VCAP®, VGEN® and/or DFTView®


Product Support

Customer Quotes

  • Intrinsix Uses VTRAN® to Speed Vector Translation Flow "I had one customer who used VHDL for RTL, Verilog for gate level simulation, and sometimes used EPIC tools. Getting vectors into the various formats was a nightmare. VTRAN® made the translation process easy and seamless. Plus, WGL or STIL for the test group. Support from Source III has also been quite impressive. In one case, they wrote a bug fix for me in under a day." John Weiland Intrinsix Consultant  
  • We currently use Vtran for translating wgl, evcd and vcd vectors to be used on various Verigy and Teradyne platforms. Their feature set has allowed us to perform vector manipulation instead of writing Perl scripts. Their support has been very responsive and they are open to additional features on future releases.
  • Source III VTRAN® tool has been very efficient to translate VCD, WGL, and STIL vectors to Teradyne UFLEX and Verigy 93000 ATE formats. Their response to add or implement new features as per customer needs is impeccable and steadfast. I would highly recommend using this tool to any test engineer for vector conversion
  • We use VTRAN® to translate WGL or TDL vectors to Teradyne J750 and Flex format. The produced patterns work fine and adaptation to a new device pinout can be done easy and quickly.
  • Sanera Utilizes Full Featured VTRAN® to Convert Functional and ATPG Vectors "We chose VTRAN® because it can handle multiple simulation file formats (including VCD and WGL) from a single tool. VTRAN's commands are easy to use. The flexibility in pin mapping, masking outputs, and generating scan-based vectors proves to be tremendously helpful. And most of all, Source III provides excellent, fast response to our support needs. This helps us to get things moving very quickly - making good solid progress." Ken ChenTest Engineering Manager
  • VTRAN® is currently our tool of choice for converting MS digital test patterns between various logic simulation formats and WGL/STIL. Our experience with SourceIII has been positive and their support is extremely responsive and timely.
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