For information or a price/delivery quotation for any of Source III's vector translation or custom interface developement services, contact us. You will find our prices and turnaround very competitive.
Source III provides vector file translation services involving the translation of logic simulation data files to vector formats either for physical device testers or for other logic simulators and analysis tools. We support translations between more than 30 formats including:
|Verilog VCD & EVCD||Verigy/Agilent 83000/93000|
|LSIM||HP 3070 testers|
|Mentor Log||IMS testers|
|plus many more||Advantest testers|
|plus many more|
Translations from WGL and STIL formats provide full support for multiple timing sets and scan data structures. WGL or STIL files generated by the Synopsys' TetraMAX™ product, or from similar ATPG products from Mentor Graphics and Cadence, can be easily translated into test programs for device testing using these more efficient scan formats.
The information required from the customer will vary depending on the formats involved. Data files in the WGL or STIL formats typically require very little additional information for translations, whereas Verilog VCD or Mentor Log files may require significantly more. Translations services are quoted on a per-file basis and will vary somewhat depending on the amount of setup required.
While Source III's VTRAN® and VGEN® products provide interfaces to most of the popular simulator and tester formats in use today, we also offer a service to add new or custom interfaces to the tool suites. This allows customers to utilize the powerful translation and generation capabilities of VTRAN® and VGEN® within the particular formats required in their development environment. Custom interfaces are quoted on an individual basis and typically require the purchase of at least one node license. In order for Source III to provide a quotation for a custom interface, the following information is needed: