Simulate Translate Test

Why Use VCAP®?

Why Use VCAP<sup>®</sup>?

Logic simulation plays an important role in the development of ASIC and full custom integrated circuits. Test engineers rely on logic simulation from designers to determine state and timing behavior before a test program can be created, and reliable state and timing data that correctly predicts fully realized IC behavior is crucial for accurate vector translations and for reducing error.

VCAP® is a comprehensive simulation and data analysis and comparison program that is part of the Source III software bundle, along with our flagship product VTRAN® and our popular display and validation tool, DFTView®. VCAP® 10.0 performs additional functions that complement the VTRAN® capabilities. VCAP® is a great addition to your Source III Vector Translation Software, including the following feature:

  • Effective Timing Analysis – Including the ability to determine output pin delays and transitions, input pin timing behavior, identify clocks, and more.
  • Comprehensive Summaries – VCAP® can collect a summary of signal transition times to help you set sample and strobe times, check tester compatibility, and more.
  • Comparison Capabilities – VCAP® has an outstanding array of features to help compare simulation data, ATPG data, and ATE programs, and adjust for format, timing, and more.

VCAP® is used in partnership with our VTRAN® product, and the combination of the two has helped countless engineers with their vector translation and testing needs. Contact us today to learn more about VCAP®, or request an evaluation key to get started.

ATPG data and ATE programs adjusting