News > New VTRAN 9.0 Release

New VTRAN 9.0 Release

Source III announces the release of VTRAN 9.0 for the Solaris and Linux platforms.

This new release continues our commitment to timely and continuous product improvements in response to the ever-changing needs of our customers. Featured in this release are the following:

• Added a new tester interface for the Advantest T2000 tester including a ReadBack module for generating Verilog testbench validation files from T2000 test programs.
• Added a general purpose IDDQ insertion mechanism which can insert up to 3 control signals and user-defined IDDQ vectors at IDDQ markers in WGL and STIL files.
• Enhanced Verilog testbench output formatters to include error flags and compare/mismatch statistics to the testbench simulation report.
• Added support for LTX Fusion HFi model and MX model MSDI mode. 
• New capabilities for MASK_PINS applied to signals during specified timesets
• Enhanced pinlist options
• Added new MAX_LOOP_COUNT feature
• VTRAN now supports Include files in the command file facilitating the use of common files.

In addition to these highlights, VTRAN has had on-going improvements to its speed, memory efficiency and overall program quality. VTRAN has played an important roll in linking simulation/ATPG to test for over 18 years with thousands of successful vector translations.